The ESD Station Model 1100 ELC tester is the world’s FIRST commercially available ESD Test System that combines all ESD, Latch-Up and CDM tests in ONE system – for devices up to 256 pins. If a dedicated DUT Board is provided (as the DUT Board example 2 on the next page), non-supply pin vs. supply pin ESD Test up to 1350 pin pairs can be tested automatically, though this is some sort of a simplified ESD test. This system can include 128 or 256 pins full pin-combination ESD test function as well as up to 4 Vcc supply Latch-up test capability and with CDM test that meets JEDEC standard with options to meet ESDA or JEITA standards.
Model 1100E : Supports HBM and MM ESD tests.
Model 1100EL : Supports HBM, MM and Latch-up tests.
Model 1100ELC: Supports HBM, MM, Latch-up and CDM tests.
By the ESD test, relations between device damage and ESD stress can be tested. The ESD stress includes Human Body Model (HBM) and Machine Model (MM). The model 1100E includes both HBM and MM but other stress model may be easily included as options. Any 128 or 256 pins can be programmed as ESD return pins (Terminal B) so that full pin combination test required by many ESD standards is allowed. Latch-up test measures the latch-up sensitivity of the CMOS devices detecting the latch-up current (Idd at latch-up detected). Current pulse, voltage pulse and supply over voltage pulse are included in the basic system as the trigger source of Latch-up. Also, HBM and MM ESD pulse may be used to trigger latch-up if required.
Other latch-up trigger source can be installed as the option so that transient latch-up can be evaluated. To get a stable latch-up test result, it is very important to stabilize the device internal conditions as well as supply current, ICC. The pull-up/down functions for all pins are provided by the basic configuration for this purpose. Clock and pattern generation is provided as an option as well. Basic configuration of CDM tester, model 1100ELC, will include JEDEC air discharge CDM head that stimulates Field Induced CDM (FI-CDM or F-CDM). Optionally, other CDM head can be provided such as DI-CDM (or D-CDM for JEITA standard) as well as FI-CDM for ESDA or AEC standard. All CDM models simulate the fast air discharge stress caused by the charged device metal terminal contact to the external metal.
Stress voltage
HBM：5V to 4500V/5V
MM：5V to 1000V/5V
HBM：±8000V（option）
Voltage accuracy: ±5％+5V of programmed value
Pin selection: 2 axis robot
Charge removal mode: 3 mode by program selection
Standards：MIL, JEDEC, JEITA, ESDA, AEC
Source meter (VF/IM）
Voltage source（VF）
±10mV to±50V, 3 digits Accuracy:2％±20mV
Measured current（IM）
±10nA to±100mA, Accuracy: 2％±20nA
Models：D-CDM and/or F-CDM
Standards：JEITA, JEDEC, ESDA, AEC
Pin count：Max1500/Device
# of DUT：Max10DUT/Jig step
Positioning accuracy：±0.05mm
Package：DIP, QFP, SOP, TAB and others
Positioning method：CCD Camera
